ISSCC 2012 Short Course: Low-Power Analog Signal Processing

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Instructor: Christian Enz is VP heading the Integrated and Wireless Systems Division of the Swiss Center for

Electronics and Microtechnology (CSEM) in Neuchâtel, Switzerland. He is also Professor at the Swiss Federal

Institute of Technology, Lausanne (EPFL), where he is lecturing and supervising students in the field of analog

and RF IC design. He received the PhD from the EPFL in 1989. His technical interests and expertise are in the

field of ultralow-power analog and RF IC design, wireless sensor networks and semiconductor device modeling.

Together with E. Vittoz and F. Krummenacher, he is the developer of the EKV MOS transistor model.

ULTRA-LOW-POWER/ULTRA-LOW-VOLTAGE ANALOG CIRCUIT DESIGN

The supply voltage of CMOS chips has been scaled down in recent years, today reaching the sub-1V region. Analog circuits unfortunately do not take advantage of this voltage scaling. In fact, almost all analog performance metrics are degraded at lower voltages. We first recall the fundamental limits of the design of low-power analog circuits. We then look at the main challenges when designing analog circuits for ultra-low-voltage (ULV) operation. We take a closer look at the MOS transistor operation with a particular focus on weak inversion. We then review several basic building blocks capable of operating at ULV.