HIR Chiplet Workshop: Architectures and Business Aspects for Heterogeneous Integration

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#chiplets #chiplet #architecture #SiP #heterogeneous integration #photonics #3D integration #test #new materials

(29:30 + 27:00 + Q&A) Two presentations on chiplets, from the 2021 IEEE Heterogeneous Integration Roadmap Symposium: “Architectures for Heterogeneous Integration”, Raja Swaminathan, Senior Fellow, AMD; “Business Aspects of Heterogeneous Integration”, Bapi Vinnakota, Open Compute Project Foundation.

The Fourth Annual Heterogeneous Integration Roadmap Symposium and Annual Meeting, held in Silicon Valley in February, 2021, was sponsored by three IEEE Societies (EDS, EPS, and Photonics), as well as ASME and SEMI.  The HIR is 600+ pages of details across all areas of advanced electronics packaging, covering pre-competitive information for industry, working engineers, and academia.  The Roadmap is available without charge at https://eps.ieee.org/hir.   Access other videos at https://ieee-region6.org/scv-eps/?p=2416

(29:30 + 27:00 + Q&A) Two presentations on chiplets, from the 2021 IEEE Heterogeneous Integration Roadmap Symposium: “Architectures for Heterogeneous Integration”, Raja Swaminathan, Senior Fellow, AMD; “Business Aspects of Heterogeneous Integration”, Bapi Vinnakota, Open Compute Project Foundation.

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